The utilities of field effect transistors formed on a SOI substrate are attracting attention because of their readiness of element isolation, latch-up free characteristics, small source/drain junction capacitances and the like.
Also, for example, Japanese Laid-open Patent Application HEI 7-211917 (JP '917) describes a method of forming high breakdown voltage field effect transistors having a drain breakdown voltage of about several hundred V on a SOI substrate. Also, Japanese Laid-open Patent Application 2003-158091 (JP '091) describes a method of forming field effect transistors that are miniaturized on the other of submicron on a SOI substrate.
It is noted here that optimum film thicknesses of SOI layers and BOX layers differ for semiconductor elements of different usages. In other words, for a high breakdown voltage field effect transistor having a drain breakdown voltage of about several hundred V, its BOX layer needs to have a larger film thickness in order to secure the breakdown strength of the BOX layer and the back-channel threshold breakdown strength, and the film thickness of the BOX layer amounts to the order of μm. For example, in the case of a high breakdown voltage field effect transistor having a drain breakdown voltage of about 50V, the film thickness of the BOX layer needs to be about several hundred nm, and in the case of a high breakdown voltage field effect transistor having a drain breakdown voltage of about 500V, the film thickness of the BOX layer needs to be about several μm.
On the other hand, for a field effect transistor that is miniaturized on the order of submicron, its BOX layer needs to have a smaller film thickness in order to suppress reduction of threshold values by short-channel effects, and thus the film thickness of the BOX layer becomes to be on the order of several hundred angstrom. For example, when the effective channel length becomes 0.1 μm or less, the film thickness of the SOI layer needs to be set to 50 nm or less, and the film thickness of the BOX layer needs to be set to 50-100 nm.
In the meantime, accompanied by the advent of ubiquitous societies, the SOC (System On Chip) technology that enables mix-mounting of devices of various breakdown voltages and digital and analog devices on a single chip is attracting attention, for further promotion of miniaturization of information portable devices, reduction of power consumption, greater multiple functions, and greater capacities.
Also, Japanese Laid-open Patent Application 2002-299591 (JP '591) describes a method of forming semiconductor elements for different usages in active layers having thicknesses suitable for the respective usages by embedding dielectric films at different depths from a main surface of a semiconductor substrate, in order to realize the SOC on a SOI substrate.
However, according to the methods described in JP '917, JP '091, and JP '591, the film thickness of the BOX layer is maintained at constant by the SOI substrate. For this reason, for forming semiconductor elements for different usages on a SOI substrate, the semiconductor elements need to be independently formed on different SOI substrates for the respective usages, which causes a problem that presents an obstruction to realization of the SOC.
Also, according to the method described in JP '591, in order to embed dielectric films at different depths from the main surface of the semiconductor substrate, oxygen ions are injected in a silicon substrate with different energies. For this reason, physical damages are generated in the silicon substrate, and the crystallinity and purity of the SOI layer deteriorate, thereby causing a problem in that, when semiconductor elements are formed in the SOI layer, their characteristics deteriorate due to PN junction leakages or the like. In particular, according to the method described in JP '591, the amount of injecting oxygen ions needs to be increased in order to increase the film thickness of the BOX layer, such that damages at the time of ion injection and stresses caused by expansion of oxygen films increase. For this reason, there are problems in that crystal defects occur in the SOI layers, and the reliability of the semiconductor device deteriorates.
Furthermore, when a method in which two wafers are bonded together to increase the film thickness of the BOX layer is used, one of the wafers needs to be removed almost entirely, which causes a problem in that the resources are wasted. Also, in the method of bonding two wafers, differences in film thicknesses of SOI layers become greater, and BOX layers of different film thicknesses cannot be formed on a common SOI substrate, which causes a problem that presents an obstruction to realization of the SOC. Also, when a SOI layer is formed on BOX layers of different film thicknesses, step differences are generated in the surface of the SOI layer, which causes a problem in that processing accuracy of the semiconductor manufacturing process deteriorates.
Accordingly, it is an object of at least one embodiment of the present invention to provide semiconductor substrates, semiconductor devices, a method for manufacturing semiconductor substrates, and a method for manufacturing semiconductor devices, which can improve flatness of surfaces of semiconductor layers, and are capable of making film thicknesses of dielectric layers and semiconductor layers different from one another.